Microelectronic packaging and methods for thermally protecting package interconnects and components

ABSTRACT

Apparatus and methods are provided wherein the reflowable electrically conductive interconnect material coupling the interconnects and/or land-side components of a microelectronic package is protected from elevated temperatures, such as those associated with reflow processes and environments which exceed the melting temperature of the interconnect material. One embodiment of the method provides covering the interconnect material about the interconnects and/or land-side components with heat-resistant curable material which protects the interconnect material from the elevated temperature and provides structural support to the interconnects and/or land-side components at the elevated temperature. One embodiment of the apparatus provides a substrate comprising interconnects and/or land-side components coupled to a carrier substrate with reflowable electrically conductive interconnect material, and a layer of heat-resistant curable material covering the interconnect material and forming fillets about the interconnects and/or land-side components.

RELATED APPLICATION

This application is a divisional of U.S. application Ser. No. 10/165,401filed Jun. 7, 2002 titled “Microelectronic Packaging and Methods forThermally Protecting Package Interconnects and Components.”

FIELD OF THE INVENTION

The present invention relates to microelectronic packaging and, moreparticularly, to packaging and methods for thermally protecting themicroelectronic package interconnects/components to prevent misalignmentand damage during high temperature reflow processing.

BACKGROUND OF INVENTION

A microelectronic die comprises multiple interconnected microcircuitswithin a single carrier to perform electronic circuit functions.Electrical communication between the microcircuits and externalcomponents is provided through an array of a plurality of very small,tightly spaced bond pads located on an active side of the die. Theconduit used to facilitate electrical communication with externalcomponents is commonly a substrate with electrically conductive paths,examples of which include a printed circuit board (PCB) and a motherboard, among others.

In many cases, the physical characteristics of the die and the substrateprohibit direct attachment. Therefore, a process commonly used providesthat the die is first coupled to a carrier substrate that is moresuitable for attachment to the substrate. The combination of a diecoupled to a carrier substrate is known in the art as a microelectronicdevice. The combination of a microelectronic device and othercomponents, such as a heat dissipation device and interconnects, amongothers, is known as a package. The package provides a number ofadvantages over the direct connection of the die to the substrate, someof which include ease of handling and assembling, improved electricalintegrity, protection from environmental contaminants, removability,among others.

One example of packaging that is becoming increasingly used in the artis flip chip-pin grid array (FC-PGA) packaging. In FC-PGA packaging, acarrier substrate is provided with a die-facing side and a land side.The die-facing side comprises an array of die land-pads in complimentaryrelationship with the bond pads of the die. The die-to-carrier substrateelectrical interconnection is made using any known reflow technique, forexample, the controlled collapse chip connection (C4) process, amongothers. The C4 process uses reflowable electrically conductiveinterconnect material in the form of solder balls with diameters rangingfrom 100 to 125 microns as a die-to-carrier substrate interconnect. Theinterconnect material is deposited onto the bond pads, and the die isplaced, interconnect material facing down, onto the respective dieland-pads. The device is exposed to an elevated temperature during thereflow process, wherein the interconnect material softens and/or meltsinto a shape controlled by the surface tension of the liquidinterconnect material. Upon cooling, the interconnect materialsolidifies and couples together the bond pads and the die land-pads.

The land side of the carrier substrate of a FC-PGA package provides anarray of interconnects in the form of pins, coupled to interconnectland-pads using reflowable electrically conductive interconnectmaterial. The pins are robust and allow for removably mounting thepackage to a substrate that has an appropriate pin socket. The array ofinterconnects can be arranged in many configurations, two of whichinclude an area array, wherein the interconnects substantially cover theentire land side, and peripheral array, wherein the interconnectsencircle an outer portion of the land side leaving a clear centralportion.

In addition to the interconnects, land-side components, such ascapacitors and resistors are commonly coupled to the land side. Theseland-side components are coupled to component land pads using reflowtechniques, commonly during the same reflow process as the coupling ofthe interconnects.

Present FC-PGA packaging techniques couple the die to the carriersubstrate prior to the coupling of the interconnects/components. This isdone since the reflow temperature used to couple the die to the carriersubstrate is commonly higher than the melting temperature of theinterconnect material used to couple the interconnects/components. Forexample, lead-free solder used as interconnect material for coupling thedie to the carrier substrate has a reflow temperature approaching 260 C,exceeding the melting temperature of 234 C for 95Sn5Sb solder which istypically used as interconnect material to couple theinterconnects/components. Therefore, the interconnects/components arecoupled to the carrier substrate after die coupling to prevent couplingfailure such as misalignment and detachment due to the high reflowtemperature of the die coupling process.

The practice of coupling the interconnects/components to the carriersubstrate after the coupling of the die presents a number of problems.For example, the die and carrier substrate are subjected to the thermalcycling of the second reflow process used for coupling theinterconnects/components, potentially weakening the delicatedie-to-carrier substrate interconnect. Also, if the package is rejecteddue to quality issues regarding the coupling of theinterconnects/components, a labor intensive rework process torealign/reattach the interconnects/components might be required in orderto “save” the package. Otherwise, the entire package, including thevaluable die, could be scrapped.

The benefits of coupling the interconnects/components prior to couplingthe die to the carrier substrate are many. For example, among others,the coupling quality of the interconnects/components can be evaluated,and if rejected, the assembly can be scrapped at little cost, withoutscrapping the die. This negates the need for labor intensive rework to“save” the package. Also, the coupling of the interconnects/componentscan be performed by the carrier substrate manufacturer, relieving thedie coupling manufacturer from additional process and quality controlsteps. Additionally, processing costs can be dramatically reduced, aswell as providing faster throughput and easier handling, by attachingthe interconnects/components to a panel comprising multiple carriersubstrates; that is, prior to singulating the individual carriersubstrates from the panel.

Methods and apparatus are needed to provide for the coupling ofinterconnects/components to the carrier substrate prior to the couplingof the microelectronic die to the carrier substrate. Further, methodsand apparatus are needed to protect the integrity of the couplingbetween the interconnects/components to the carrier substrate for hightemperature applications.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a flow diagram of a method in accordance with an embodiment ofthe invention;

FIGS. 2A and 2B are top and bottom views of a carrier substratecomprising a die side and a land side, respectively;

FIG. 2C is a side view of two types of interconnects;

FIG. 2D is a side view of a land-side component;

FIG. 2E is a land-side view of a panel comprising multiple substrates inaccordance with an embodiment of the invention;

FIG. 3 is a partial cross-sectional view of a carrier substratecomprising interconnects/components in accordance with an embodiment ofthe invention;

FIGS. 4A-4C are cross-sectional, land side, and partial cross-sectionalviews, respectively, of a carrier substrate comprisinginterconnects/components and a curable material layer, in accordancewith an embodiment of the invention;

FIG. 5A is a cross-sectional exploded view of a carrier substratecomprising interconnects/components and a curable material layer inaccordance with an embodiment of the invention;

FIG. 5B is a partial cross-sectional view of a carrier substratecomprising interconnects/components and a curable material layerpost-reflow and post-underfill in accordance with an embodiment of theinvention;

FIG. 5C is a cross-sectional view of a package comprising a carriersubstrate comprising interconnects/components, a curable material layer,and a heat dissipation device, in accordance with an embodiment of theinvention;

FIG. 6 is a flow diagram of another embodiment of the method inaccordance with the invention;

FIG. 7 is a cross-sectional view of a package prior to coupling theinterconnects/components;

FIGS. 8A and 8B are full and partial cross-sectional views,respectively, of a package comprising interconnects/components;

FIG. 9A is a cross-sectional view of the package comprising a curablematerial layer in accordance with an embodiment of the invention;

FIG. 9B is a partial cross-sectional view of a package comprising acurable material layer in accordance with an embodiment of theinvention;

FIG. 10 is a cross-sectional view of the package comprising a curablematerial layer in accordance with an embodiment of the invention;

FIGS. 11 and 12 are graphical representations of validating experimentaldata in accordance with an embodiment of the invention;

FIGS. 13A and 13B are exploded cross-sectional and cross-sectionalviews, respectively, of a package in accordance with an embodiment ofthe invention; and

FIGS. 14A and 14B are exploded cross-sectional and cross-sectional,respectively, of a package in accordance with an embodiment of theinvention.

DESCRIPTION

In the following detailed description, reference is made to theaccompanying drawings which form a part hereof wherein like numeralsdesignate like parts throughout, and in which is shown by way ofillustration specific embodiments in which the invention may bepracticed. It is to be understood that other embodiments may be utilizedand structural or logical changes may be made without departing from thescope of the present invention.

The following description illustrates the application of the inventionas it applies to flip chip-pin grid array (FC-PGA) packaging. It isunderstood that the inventive apparatus and methods can be used with andbenefit other packaging technologies. Other packaging technologies thatbenefit from the inventive apparatus and methods include, but notlimited to, ball grid array packaging and organic land grid arraypackaging. Therefore, the following detailed description is not to betaken in a limiting sense, and the scope of the present invention isdefined by the appended claims and their equivalents.

FIG. 1 is a flow diagram of a method 100 in accordance with anembodiment of the invention. The method 100 involves coupling theinterconnects and/or land-side components to a carrier substrate usingreflowable electrically conductive interconnect material prior to thereflow process used to couple the die to a carrier substrate. Theinterconnect material coupling the interconnects and/or land-sidecomponents to the carrier substrate is covered with curable materialwhich produces a hard coating to protect the interconnect material fromand support the interconnects and/or land-side components during thehigh temperature used in the reflow process to couple the die to thecarrier substrate.

In accordance with the method 100, a carrier substrate assembly isprovided comprising interconnects and/or land-side components coupled toa land side of a carrier substrate using reflowable electricallyconductive interconnect material 102. The carrier substrate assembly ispositioned in a land-side-up orientation 104. A liquid or semi-liquidcurable material is applied to cover and encapsulate the interconnectmaterial about the interconnects and/or land-side components 106. Thecurable material is hardened by appropriate curing 108. A die is coupledto a die side of the carrier substrate using conventional reflowprocesses 110, or other processes known in the art.

In accordance with another embodiment of the method 100, a carriersubstrate assembly is provided comprising interconnects and/or land-sidecomponents coupled to the land side of a carrier substrate usingreflowable electrically conductive interconnect material 102. Thecarrier substrate assembly is positioned in a land-side-up orientation104. A liquid or semi-liquid curable material is applied along a singleline between the interconnects and the land-side components to cover andencapsulate the interconnect material about the interconnects and theland-side components by capillary action 112. The curable material ishardened by appropriate curing 108. A die is coupled to a die side ofthe carrier substrate using conventional reflow processes 110 or otherprocesses known in the art.

FIGS. 2A and 2B are top and bottom views of a carrier substrate 10having a die side 15 and a land side 17, respectively, commonly found inthe art. The die side 15 comprises die land pads 16 oriented in anarray. The land side 17 comprises an outer portion 11 having an array ofinterconnect land-pads 18 and a central portion 13 having an array ofcomponent land-pads 41.

FIG. 2C is a side view of two common types of interconnects 30 used forFC-BGA packaging; a flat-headed pin 30 a having a head 32, and athrough-hole pin 30 b. The flat-headed pin 30 a is appropriate for flatinterconnect land-pads and the through-hole pin 30 b is appropriate forthrough-hole interconnect land-pads. These are simply examples ofinterconnects 30, and the methods and apparatus of the present inventionmay be practiced regardless of the style of the interconnects 30. Theelement “interconnect land-pad” is used herein to represent anyelectrical contact member on the carrier substrate 10 adapted to couplewith any type of interconnect 30.

FIG. 2D is a side view of a generic representation of a land-sidecomponent 40 having interconnect legs 42 adapted to couple with thecomponent land-pads 41. The interconnects 30 and land-side components 40are coupled to the interconnect land-pads 18 and component land-pads 41,respectively, in accordance with well known reflow techniques usingreflowable electrically conductive interconnect material.

FIG. 3 is a cross sectional view of a portion of a carrier assembly 71comprising interconnects 30 and land-side components 40 coupled tointerconnect land-pads 18 and component land-pads 41, respectively, withinterconnect material 34 in accordance with an embodiment of theinvention. In one embodiment, the interconnects 30 and land-sidecomponents 40 can be coupled on an individual carrier substrate 10 asshown in FIG. 2B, or, in another embodiment, as a panel 10′ as shown inFIG. 2E, wherein multiple carrier assemblies 71 are produced from asingle panel 10′. Subsequent to the coupling of the interconnects 30 andland-side components 40, individual carrier substrates 10 are singulatedor separated from the panel 10′, or in another embodiment, remain as apanel 10′ for further processing.

A reflowable electrically conductive interconnect material 34 commonlyused to couple the interconnects 30 and the land-side components 40 tothe carrier substrate 10, is a tin-based solder comprising 37% lead(Sn/37Pb solder) having a melting temperature of 183 C. A typical reflowtemperature for Sn/37Pb solder is 205 C. In the industry push to uselead-free solder, a tin-based solder is being used that comprises 3.5%silver (Sn/3.5Ag solder) having a melting temperature of 221 C and areflow temperature of 240 C. Another lead-free solder that is being usedis a tin-based solder comprising 5% antimony (Sn/5Sb solder) having amelting temperature of 234 C and a reflow temperature of 255 C. One canappreciate that if the die is coupled to the carrier substrate 10 usinga higher melting temperature solder subsequent to the coupling of theinterconnects/components 30,40 with a lower melting temperature solder,the interconnect material 34 coupling the interconnects/components 30,40will be exposed to temperatures exceeding the melting temperaturepotentially causing coupling failure, such as misalignment orde-coupling of the interconnects/components 30,40 from the carriersubstrate 10.

FIGS. 4A-4C are cross-sectional, land side, and partial cross-sectionalviews, respectively, of the carrier assembly 71 and encapsulated carrierassembly 72, respectively, illustrating a process of encapsulating theinterconnect material 34 about the interconnects 30 and land-sidecomponents 40, in accordance with an embodiment of the invention. Whilethe carrier assembly 71 is held in a land-side-up orientation, anapplicator 60 applies a curable material 36 to the land side 17 suchthat the interconnect material 34 is covered with a layer of the curablematerial 36. The applicator 60, in accordance with another embodiment ofthe invention, warms the curable material 36 prior to application toimprove the flow of the curable material 36 over the surface of the landside 17.

In one embodiment, a curable material 36 having a predeterminedviscosity is applied at one location of the land side 17, and, viacapillary action, the curable material 36 spreads and covers theinterconnect material 34 about the interconnects 30 and land-sidecomponents 40. In another embodiment, a curable material 36 having apredetermined viscosity is applied by moving the applicator 60 about andbetween the interconnects 30 and land-side components 40 traversing theland side 17 to provide the necessary compete coverage.

Some formulations of curable material 36 that can be used includesunderfill material used in the art between the die 20 and the carriersubstrate 10, provided that it can resist the high temperatures ofreflow. Curable material 36 rated to withstand a temperature of 260 Cremains undamaged during a subsequent high temperature reflow process.The curable material 36 can also be “filled” with a particulate orfibrous material to provide added strength. Any curable material 36suitable for the intended purpose can be used, including, but notlimited to, UV, thermal, chemical and microwave curing material.

In another embodiment in accordance with the invention, the curablematerial 36 has a predetermined viscosity appropriate to form a layer ofcurable material 36 on the interconnect material 34 about theinterconnects 30 and land-side components 40 by capillary action. Thecurable material 36 is drawn slightly up the interconnects 30 andland-side components 40 to form fillets 37. The fillets 37 providestructural support to the interconnects 30 and land-side components 40when the interconnect material 34 is weakened at elevated temperature.

In another embodiment of the method in accordance with the invention,the curable material 36 is dispensed from the applicator 60 in a singlecircular pass 62 applied between the outer portion 11 and center portion13, between the interconnects 30 and the land-side components-40,respectively. The curable material 36 is adapted to have a predeterminedviscosity such that the curable material 36 flows by capillary action toform a layer of curable material 36 on the interconnect material 34 andabout the interconnects 30 and land-side components 40. The curablematerial 36 is drawn slightly up the interconnects 30 and land-sidecomponents 40 to form fillets 37. The fillets 37 provide structuralsupport to the interconnects 30 and land-side components 40 when theinterconnect material 34 is weakened at elevated temperature. Thecurable material 36 can be applied to individual carrier assemblies 71,or, as discussed above, to a panel 10′ wherein individual carrierassemblies 71 are subsequently singulated.

In accordance with the invention as shown in FIG. 4C, the curablematerial 36 covers the interconnect material 34 and the thickness of thecurable material 36 must be sufficient to provide structural support tothe interconnects 30 and interconnect legs 42 of the land-sidecomponents 40 in cases wherein the interconnect material 34 soften ormelts at elevated temperatures. The thickness of the curable material 36has to be sufficient to cover and contain the interconnect material 34but not so thick as to interfere with the insertion of the interconnects30 into the intended receptacle, such as a socket. The curable material36 must not form such a high filet 37 about the interconnects 30 thatthe package is prevented from fully seating within a socket (not shown);a situation which would effect the electrical resistance and inductanceof the electrical system.

It has been found that a layer of curable material 36 having a thicknessof about 0.010 inches to about 0.015 inches provides satisfactoryresults. The thickness of the curable material 36, either lower orhigher, is anticipated and within the scope of the invention to meet theneeds of specific package configurations and conditions.

The method of dispensing the curable material 36 onto the carrierassembly 71 is not to be limited to the methods previously described.The method of dispensing the curable material 36 will depend on thespecific configuration of the carrier assembly 71. For example, acarrier assembly 71 having a land side 17 comprising a full pin gridarray, that is, interconnects 30 equally distributed substantiallyacross the entire land side 17 of the carrier assembly 71, may requirethe application of the curable material 36 from along a peripheral edge28 of the carrier substrate 10 and/or between the interconnects 30.Additionally, for the embodiment wherein the carrier assembly 71 are notsingulated but remain as a panel 10′ as shown in FIG. 2E, theapplication of the curable material 36 may be along the cut streets 9between each array of interconnects 30.

FIG. 5A is a cross-sectional exploded view of the encapsulated carrierassembly 72 of FIG. 4C, comprising curable material 36 applied andcured, in accordance with the method of FIG. 1. The encapsulated carrierassembly 72 is orientated land side 17 down with the die land pads 16facing up. The die 20 is provided with bond pads 22, each having a diereflowable electrically conductive interconnect material 24 depositedthereon. The bond pads 16 are registered or aligned with respective dieland pads 16 on the carrier substrate 10. A reflow process, such as thatprovided by the C4 process is used to couple the die 20 to theencapsulated carrier assembly 72. During the reflow process, the carrierassembly 73 is subjected to thermal conditions commonly 10 C to 20 Chigher than the melting temperature of the interconnect material 34coupling the interconnects/components 30,40 to the carrier substrate 10.Upon heating, the die interconnect material 24 softens/melts/reflows tophysically and electrically couple with the bond pads 22 and the dieland pads 16 upon cooling.

The curable material 36 covers and protects the interconnect material 34of the interconnects 30 and land-side components 40 from the hightemperature of the reflow process. The curable material 36 also holdsthe interconnects 30 and land-side components 40 to the carriersubstrate if the interconnect material 34 softens or melts during thereflow process.

FIG. 5B is a partial cross sectional view of a partially assembledpackage 73 post-coupling of the die 20 to the encapsulated carrierassembly 72. Following the reflow process, a gap 25 remains between thedie 20 and the die side 15 of the carrier substrate 10. The gap 25 isprovided with an underfill curable material 26, a process common in theart. Capillary action draws the underfill curable material 26 into thegap 25 and provides a fillet 27 around the perimeter of the die 20. Theunderfill curable material 26 is cured in accordance with the type ofunderfill curable material 26 used, forming a strong adhesive bondbetween the die 20 and the carrier substrate 10.

FIG. 5C is a cross-sectional view of a package 75 comprising a heatdissipation device 50 coupled to the partially assembled package 73,shown as a heat spreader. The heat dissipation device 50 is coupled tothe die side 15 of the carrier substrate 10 and in thermal contact withthe die 20 to provide a broad surface to augment heat dissipation fromthe die 20. The edges 51 of the heat dissipation device 50 are coupledto the die side 15 and acts to provides a cover that provides protectionto the die 20 against the environment.

FIG. 6 is a flow diagram of a method 200 in accordance with anotherembodiment of the invention. A package that is produced by commonlyknown reflow methods is provided with a temperature-resistant curablematerial covering the interconnect material about the interconnects andland-side components. In other words, this method can be applied to anypackage that requires further high temperature processing or mustwithstand high temperature applications.

In accordance with the method 200, a package is provided comprisinginterconnects and/or land-side components coupled to a carrier substrateusing reflowable electrically conductive interconnect material applyingcommon reflow techniques 202. The package is positioned in aland-side-up orientation 204. A liquid or semi-liquid curable materialis applied to cover and encapsulate the interconnect material about theinterconnects and/or land-side components 206. The curable material ishardened by appropriate curing 208.

In accordance with another embodiment of the method 200, a package isprovided comprising interconnects and/or land-side components coupled toa carrier substrate using reflowable electrically conductiveinterconnect material applying common reflow techniques 202. The packageis positioned in a land-side-up orientation 204. A liquid or semi-liquidcurable material is applied along a single line between theinterconnects and the land-side components to cover and encapsulate theinterconnect material about the interconnects and the land-sidecomponents by capillary action 212. The curable material is hardened byappropriate curing 208.

FIG. 7 is a cross section of an incomplete package 76; that is, prior tothe attachment of the interconnects/components. The package 76 ismanufactured in accordance with a known process, such as the C4 process,to couple the die 20 to the carrier substrate 10. Optionally, and asshown in FIG. 7, underfill curable material 26 is applied about and inthe gap between the die 20 and the carrier substrate 10 to aid instructural support of the die 20. Additionally, a heat dissipationdevice 50 is coupled to the die 20 and the carrier substrate 10 whichprovides protection for the die 20 from the environment.

FIGS. 8A and 8B are full and partial cross-sectional views,respectively, of a package 77, shown as a FC-PGA package. The package 77comprises the incomplete package 76 of the embodiment of FIG. 7 withinterconnects 30 and the land-side components 40 coupled to the carriersubstrate 10 in accordance with known reflow methods.

FIGS. 9A and 9B are cross-sectional and partial cross-sectional views ofan encapsulated package 79 in accordance with an embodiment of theinvention. The encapsulated package 79 comprises the package 77 of FIGS.8A-B having a curable material 36 applied on the land side 17 coveringthe interconnect material 34 about the interconnects 30 and theland-side components 40. The package 77 is orientated such that the landside 17 of the carrier substrate 10 is facing up. A dispenser 60 is usedto apply curable material 36 to the land side 17 in a process similar tothat discussed earlier. A layer of curable material 36 is formed on theinterconnect material 34 about the interconnects 30 and the land-sidecomponents 40 by capillary action or by direct application. The curablematerial 36 is cured in accordance with the type of curable material 36used, encapsulating the interconnect material 34 about the interconnects30 and the land-side components 40.

FIG. 10 is a cross-sectional view of a package 80 in accordance with thepresent invention. The package 80 comprises the encapsulated package 79wherein the curable material 36 having been cured encapsulating theinterconnect material 34. The package 80 can now be used in hightemperature processes or applications experiencing temperatures inexcess of the melting temperature of the interconnect material 34. Thecurable material 36 couples the interconnects/components 30,40 to thecarrier substrate 10 to prevent misalignment or failed coupling causedby the interconnect material 34 becoming soft or molten at elevatedtemperatures.

The benefits of encapsulating the interconnect material of theinterconnects and the land-side components was experimentally verified.In the experimentation, standard packages comprising pin and land-sidecomponents, such as shown in FIG. 8A, in the form of FC-BGA packages,also referred to as plan of record (POR) packages, which weremanufactured according to standard practice, were compared withencapsulated packages, such as shown in FIG. 10, which were manufacturedaccording to the methods of the present invention to encapsulate theinterconnect material about the interconnects and the land-sidecomponents. The average thickness of the applied curable material was0.012 to 0.015 inches.

The POR and encapsulated packages were evaluated for pin alignment afterexperiencing elevated reflow temperatures. A common measurement for pinalignment is known as pin radial true position (TPR). An average TPR forthe FC-BGA package of about 0.002 inches, and a maximum of about 0.006inches, is considered acceptable in the art.

Twenty POR packages were used as experimental controls; known as end ofline (EOL) packages. Twenty encapsulated packages were produced usingcurable material to encapsulate the interconnect material in accordancewith the methods of FIG. 6. Ten each of the POR and encapsulatedpackages were subjected to a reflow cycle with a maximum temperature of240 C. Ten each of the remaining POR packages and encapsulated packageswere subjected to a reflow cycle with a maximum temperature of 260 C.

The data for maximum and average TPR are presented in FIGS. 11 and 12,respectively. It can be seen that the POR packages exhibited a maximumTPR of up to about 0.009 inches after the 240 C reflow and up to about0.0115 inches after the 260 C reflow. The encapsulated packagesexhibited a maximum TPR of about 0.006 inches after both the 240 C and260 C reflow cycles, virtually the same TPR as the EOL packages that didnot experience the reflow process.

Similarly, the POR package had an average TPR of up to about 0.00325inches after the 240 C reflow and up to about 0.0039 inches after the260 C reflow. The encapsulated packages resulted in an average TPR ofabout 0.0025 inches after the 240 C and 260 C reflow cycles, virtuallythe same as the EOL packages.

The TPR of the EOL packages were statistically identical with theencapsulated packages made in accordance with the present invention andexposed to the reflow conditions. The results shown in FIGS. 11 and 12clearly demonstrate the improvement provided by encapsulating theinterconnect material as practiced using the methods in accordance withthe invention.

The POR packages and pin-encapsulated packages also comprise land-sidecomponents coupled and encapsulated in accordance with the method of theinvention of FIG. 6. Visual observation of the condition of theland-side components revealed that the reflow process had little or noeffect on the integrity of the coupling of the land-side components tothe carrier substrate. Therefore, the benefits of the encapsulation ofthe interconnects extends to the land-side components.

It is significant to note that at the very high reflow temperatures ofup to 260 C, there is corresponding potential for coefficient of thermalexpansion (CTE) mismatch between the curable material and theinterconnect material. This CTE mismatch has the potential to cause theinterconnect material to wick-out or extrude from the curable material.This was not observed.

The encapsulation by the curable material was sufficient to prevent pinmovement and corresponding pin alignment problems when the interconnectmaterial is softened or melted, while not putting significant force onthe interconnect material caused by the CTE so as to cause failure ofthe coupling of the interconnects/components to the carrier substrate.

FIG. 13A is a cross-sectional exploded view of an encapsulated package81 comprising the partially assembled package 76, in accordance withanother embodiment of the invention. Prior to coupling theinterconnects/components 30,40 to the partially assembled package 76, ahighly viscous curable material 136 is applied to the land side 17 ofthe carrier substrate 10. The highly viscous curable material 136comprises particulate reflowable electrically conductive interconnectmaterial commixed with a curable material. The highly viscous curablematerial 136 is adapted such that after application onto the land side17 of the carrier substrate 10, the highly viscous curable material 136will substantially remain in place. The interconnects 30 and land-sidecomponents 40 are inserted through the highly viscous curable material136 to abut respective interconnect land-pads 18 and component land-pads41 (not shown). The encapsulated package 81 is processed at a reflowtemperature sufficient to cause the interconnect material in the highlyviscous curable material 136 to reflow, coupling theinterconnects/components 30,40 to the interconnect/component land-pads18,41, as well as cure the highly viscous curable material 136,encapsulating the interconnect material 34.

FIG. 14A is a cross-sectional exploded view of an assembly 82 comprisinga partially assembled package 76, in accordance with another embodimentof the invention. Prior to coupling the interconnects/components 30,40to the partially assembled package 76, a highly viscous curable material236 is applied to the land side 17 of the carrier substrate 10. Thehighly viscous curable material 236 is adapted such that afterapplication onto the land side 17 of the carrier substrate 10, thehighly viscous curable material 236 will substantially remain in place.The interconnects/components 30,40 are provided with a layer ofreflowable electrically conductive interconnect material 134 on the pinhead 32 and on the land-side component interconnect legs 42. Theinterconnects 30 and the interconnects legs 42 are inserted through thehighly viscous curable material 236 such that the interconnect material134 on the interconnects/components 30,40 abuts the respectiveinterconnect land-pads 18 and component land-pads 41. The partiallyassembled package 76 is processed at a reflow temperature sufficient tocause the interconnect material 134 to reflow and couple theinterconnects 30 to the interconnect land-pads 18 and the legs 42 to thecomponent land-pads 41, as well as cure the highly viscous curablematerial 236, encapsulating the interconnect material 34.

The present description describes the use of a curable material capableof withstanding reflow temperatures. It is recognized that there aremany types of materials suitable for the particular purpose. Therefore,the curable material described in the detailed description is not to betaken in a limiting sense. One example of a suitable material is acurable liquid or semi-solid dispensable/film type adhesive. Theadhesive material composition comprises one or more of, but not limitedto, epoxy resin, fillers such as silica particles, curing agents such asanhydride/amine/phenol polymers, and coupling agents. The curablematerial may further comprise monomeric or oligomeric hardners whichfacilitates the curing process by decreasing the volatilization of thecomposition. Further, controlling the amount of oligomeric hardnersand/or polymers in the curable material effects cross-linking of thematerial, which can be formulated to modify viscosity, moistureabsorption, volatilization and modulus, mechanical properties, and/oradhesion. The curable material may also comprise catalysts for promotingcross-linking and to control cure time, elastomers for toughening,and/or fluxing agents, and other additives for flow modification,adhesion and, for UV curable resins, photo labile/active compounds. Thecurable material may also have a high glass transition temperature(T_(g)), and high degradation temperature, thereby resulting in a robustmaterial for 260° C. reflow conditions.

Microelectronic packages made in accordance with embodiments of thepresent invention provides a variety of benefits. A carrier substratecomprising land-side components and interconnects in the form of pinscan now be exposed to temperatures approaching and exceeding the meltingtemperature of the interconnect material coupling theinterconnects/components to the carrier substrate without detrimentaleffect to the integrity of the coupling of the interconnects and theland-side components. The methods of the present invention negates theneed for interconnect rework due to interconnect failure ormis-alignment due to thermal conditions. Further, the interconnects andthe land-side components can be coupled by the carrier substratemanufacturer and not the manufacture who couples the die to the carriersubstrate, reducing die scrap rates and increasing manufacturing speed.

Although specific embodiments have been illustrated and described hereinfor purposes of description of the preferred embodiment, it will beappreciated by those of ordinary skill in the art that a wide variety ofalternate and/or equivalent implementations calculated to achieve thesame purposes may be substituted for the specific embodiments shown anddescribed without departing from the scope of the present invention.Those with skill in the art will readily appreciate that the presentinvention may be implemented in a very wide variety of embodiments. Thisapplication is intended to cover any adaptations or variations of theembodiments discussed herein. Therefore, it is manifestly intended thatthis invention be limited only by the claims and the equivalentsthereof.

1. A method, comprising: providing a carrier substrate having a landside and a die side opposite the land side, the land side including apin that is coupled to the land side with reflowable electricallyconductive interconnect material; covering a layer of curable materialon the interconnect material about the pin; and curing the curablematerial into a hardened state to contain the pin from de-coupling withan interconnect land pad on the surface of the land side of the carriersubstrate at temperatures exceeding the melting temperature of theinterconnect material.
 2. The method of claim 1, further comprising:coupling a land-side component to the land side of the carrier substratewith another collection of reflowable electrically conductiveinterconnect material, covering the other collection ofinterconnect-material about the land-side component with another layerof curable material; and curing the curable material covering the othercollection of interconnect material about the land-side component into ahardened state to contain the land-side component from de-coupling froma component land pad on the land side of the carrier substrate attemperatures exceeding the melting temperature of the other collectionof interconnect material.
 3. The method claim 1, further comprisingcoupling a microelectronic die to the die side of the carrier substrate.4. The method claim 3, further comprising-coupling a heat dissipationdevice to the die.
 5. The method of claim 1, wherein said providingcomprises providing a carrier substrate including a pin selected fromthe group consisting of a flat-headed pin and a through-hole pin.
 6. Themethod of claim 1, wherein said providing comprises providing a carriersubstrate including a pin of a flip chip-pin grid array package.
 7. Themethod of claim 1, wherein said providing comprises coupling the pin tothe land side with a reflowable electrically conductive interconnectmaterial selected from the group consisting of lead-free solder andsolder comprising lead.
 8. The method claim 1, wherein said coveringcomprises covering a layer of curable material that is at least 0.010inches thick on the interconnect material about the pin.
 9. The methodof claim 1, wherein said covering comprises covering the interconnectmaterial about the pin with a curable material having a viscosity thatallows the curable material to form a fillet about the pin.
 10. Themethod of claim 1, further comprising: coupling a land-side component tothe land side of the carrier substrate with another collection ofreflowable electrically conductive interconnect material; coupling amicroelectronic die to the die side of the carrier substrate; coupling aheat dissipation device to the die; and covering the other collection ofreflowable electrically conductive interconnect material about theland-side component with another-layer of curable material and curingthe curable material into a hardened state to contain the land-sidecomponent from de-coupling from a component land pad on the land side ofthe carrier substrate at temperatures exceeding the melting temperatureof the interconnect material, and the layer of curable material having apredetermined viscosity that allows the curable material to form filletsabout the pin and land-side component.
 11. A method, comprising:providing a substrate with a land side and a die side opposite the landside, the land side having a plurality of interconnect land pad arrays,each of the plurality of interconnect land-pad arrays having a pluralityof interconnect land pads; coupling one or more pins to one or more ofthe plurality of interconnect land pads with reflowable electricallyconductive interconnect material; covering a layer of curable materialon the reflowable electrically conductive interconnect material aboutthe one or more pins; and curing the curable material into a hardenstate to contain the one or more pins from decoupling from the one ormore of the plurality of interconnect land pads at temperaturesexceeding the melting temperature of the interconnect material.
 12. Themethod of claim 11, wherein one or more of the plurality of interconnectland pad arrays further includes one or more component land-pads, andthe method further comprises: coupling one or more land-side componentsto the one or more component land-pads with another collection ofreflowable electrically conductive interconnect material; covering theother collection of interconnect material about the land-side componentswith another layer of curable material; and curing the curable materialand hardening the curable material to contain the one or more land-sidecomponents from de-coupling with the one or more of the componentland-pads at temperatures exceeding the melting temperature of the othercollection of interconnect material.
 13. The method of claim 12, furthercomprising forming one or more die land-pad arrays on the die side ofthe substrate, the one or more die land-pad arrays corresponding to oneor more of the plurality of interconnect land pad arrays, one dieland-pad array being opposite to one interconnect land pad array, eachdie land-pad array having a plurality of die land pads.
 14. The methodof claim 13, further comprising coupling a microelectronic die having anarray of bond pads that are located on the microelectronic die in acomplementary manner to one die land-pad array, wherein the couplingincludes coupling the bond pads to the die land pads with still anothercollection of reflowable electrically conductive interconnect material.15. A method for assembling a microelectronic package, comprising:providing a carrier substrate including an array of interconnectscoupled to a land side with reflowable electrically conductiveinterconnect material; applying a layer of curable material on theinterconnect material about the interconnects, wherein the curablematerial, once cured to a solid state, contains the interconnects fromde-coupling from the land side at temperatures exceeding the meltingtemperature of the interconnect material; and curing the layer ofcurable material.
 16. The method of claim 15, wherein applying a layerof curable material on the interconnect material comprises applying alayer of material having reflowable electrically conductive particulateinterconnect material commixed with curable material to the interconnectmaterial.
 17. The method of claim 15, further comprising coupling one ormore land-side components to the land side with another collection ofreflowable electrically conductive interconnect material; and applying alayer of curable material about the other collection of interconnectmaterial of the one or more land-side components, and wherein thecurable material about the one or more land-side components, once curedto a solid state, contain the land-side components from de-coupling attemperatures exceeding the melting temperature of the other collectionof interconnect material.
 18. The method of claim 17, wherein the arrayof interconnects are oriented around an outer portion of the land sidedefining a central portion having no interconnect land-pads, the one ormore land-side components being coupled within the central portion, andwherein applying a layer of curable material on the interconnectmaterial about the interconnects comprises depositing the curablematerial onto the land side between the array of interconnects and theone or more land-side components, wherein the curable material migratesto and covers the interconnect material and form fillets about theinterconnects and the one or more land-side components via capillaryaction.
 19. The method of claim 15, wherein applying a layer of curablematerial comprises dispensing the curable material in a liquid orsemi-liquid form, flowing the curable material about the interconnectsto cover the interconnect material, and forming fillets about theinterconnects via capillary action.
 20. The method of claim 19, furthercomprising heating the carrier substrate prior to dispensing the curablematerial.